Dr. Xie Jiafeng, Assistan Professor, Electrical and Computer Engineering, Villanova University

Post-quantum cryptography (PQC) has drawn significant attention from various communities recently as the existing public-key cryptosystems such as Rivest Shamir Adleman (RSA) and Elliptic Curve Cryptography (ECC) are proven to be vulnerable to the large-scale quantum computers executing Shor’s algorithm. The National Institute of Standards and Technology (NIST) has already started the PQC standardization process, and hardware acceleration for PQC algorithms is one of the recent focused topics. In this talk, I will follow this trend to introduce several interesting methods to accelerate the PQC algorithms on the hardware platform. Specifically, this talk will present the hardware implementation methods from the aspects of both algorithmic derivation and architectural innovation. Implementation techniques for a lightweight PQC scheme are also covered in this talk. I hope that this talk will facilitate more research to help the PQC standardization and further development.